Latest News
July 2010
European Expert Panel Proposes New Analogue IC Design Methodology to Counter the Analogue Bottleneck
GSA, the voice of the global semiconductor industry, recently hosted a panel of European analogue IC design experts at the GSA & IET International Semiconductor Forum in London on 19 May. The discussion led to a possible solution to the analogue IC design bottleneck. [more »]
June 2010
IC Mask Design to Present at the Design Automation Conference in Anaheim California
Chief Technical Officer Ciaran Whyte to present HiPerDevGen, a High Performance Device and Structure Generation Platform for A/MS Design [more »]
April 2010
IC Mask Design to Participate on Panel Discussion at GSA / IET Semiconductor Forum
Chief Technical Officer Ciaran Whyte to present his views on Analog: The New Bottleneck [more »]
March 2010
IC Mask Design Completes Physical Design of Video Processor IC on 65nm Technology Node
IC Mask Design has responsibility for Digital Physical Implementation [more »]
March 2010
IC Mask Design and Tanner EDA Collaborate on Tools to Accelerate Analog Layout Design
IC Mask Design's layout technology and Tanner EDA's expertise to boost IC design productivity and quality worldwide [more »]
December 2009
IC Mask Design to Invest €450k in R&D with Enterprise Ireland Support
Services Company Develops Intelligent Layout Acceleration EDA Tool to Reduce Costs and Time to Market. [more »]