HiPerDevGen, the Analog Layout Acceleration software tool from IC Mask Design / Tanner EDA has been shortlisted for a prestigious European Electronics Industry Award.
GSA, the voice of the global semiconductor industry, recently hosted a panel of European analogue IC design experts at the GSA & IET International Semiconductor Forum in London on 19 May. The discussion led to a possible solution to the analogue IC design bottleneck.
Chief Technical Officer Ciaran Whyte to present HiPerDevGen, a High Performance Device and Structure Generation Platform for A/MS Design
Chief Technical Officer Ciaran Whyte to present his views on Analog: The New Bottleneck
IC Mask Design has responsibility for Digital Physical Implementation
IC Mask Design’s layout technology and Tanner EDA’s expertise to boost IC design productivity and quality worldwide.
Services Company Develops Intelligent Layout Acceleration EDA Tool to Reduce Costs and Time to Market.